The Am29F002 Family consists of 2 Mbit, 5.0 volt-only Flash memory devices organized as 262,144 bytes. The Am29F002 offers the RESET# function, the Am29F002N does not. The data appears on DQ7 DQ0. The device is offered in 32-pin PLCC, 32-pin TSOP, and 32-pin PDIP packages. This device is designed to be programmed in-system with the standard system 5.0 volt VCC supply. No VPP is required for write or erase operations. The device can also be programmed in standard EPROM programmers.
The standard device offers access times of 55, 70, 90, and 120 ns, allowing high speed microprocessors to operate without wait states. To eliminate bus contention the device has separate chip enable (CE#), write enable (WE#) and output enable (OE#) controls.
The device requires only a single 5.0 volt power supply for both read and write functions. Internally generated and regulated voltages are provided for the program and erase operations.
The device is entirely command set compatible with the JEDEC single-power-supply Flash standard. Commands
are written to the command register using standard microprocessor write timings. Register contents serve as input to an internal state-machine that controls the erase and programming circuitry. Write cycles also internally latch addresses and data needed for the programming and erase operations. Reading data out of the device is similar to reading from other Flash or EPROM devices.
Device programming occurs by executing the program command sequence. This initiates the Embedded Program algorithm-an internal algorithm that automatically times the program pulse widths and verifies proper cell margin.
Device erasure occurs by executing the erase command sequence. This initiates the Embedded Erase algorithm-an internal algorithm that automatically preprograms the array (if it is not already programmed) before executing the erase operation. During erase, the de
Required Field 
